Sundar Raman Ramani
Director of Engineering, Asic Design at Synapse Design Automation Inc
Sundar Raman Ramani has been working as a Associate V.p Engineering at Synapse Design Inc. since 2013. Moreover, the professional has on-the-job experience at more than eight companies in the related field. Sundar has a total work experience of 21+ years. Sundar Raman Ramani studied at the National University of Singapore from 1995 to 1996. Nowadays this professional lives in Santa Clara, California region. Find Sundar Raman Ramani's actual phone and email through SoftwareOfficial search.
Name variants:
Sundar Ramani
Last updated Jun 16, 2024
Contact Information
Last Update
Jul 14, 2022
Email
sr**@synapse-da.com, ra**@gmail.com, ra**@gmail.com
Location
Santa Clara, CA
Company
Workplace
Colleagues
Work History
Associate V.p Engineering
2200 Laurelwoodv Rd, Santa Clara, CA
Heading the Hardware IC Engineering team at Synapse India and responsible for pre-sales support, engineering team-building, enhancing customer relationship and execution of complex CMOS ASICs.
Jan 2013 — Aug 2014
Director of Engineering, Asic Design at Synapse Design Automation Inc
2200 Laurelwoodv Rd, Santa Clara, CA
Executing and Managing ASIC Implementation projects across global locations from RTL to GDSII. Devise new methodologies in chip implementation for technology nodes below 16nm and clocks abov...
from Aug 2014
Senior Director - Physical Design
2200 Laurelwoodv Rd, Santa Clara, CA
Managing a team of about one hundred Physical Implementation engineers at Synapse India. Responsibilties include
Supporting the business development team in building project proposal and p...
Aug 2011 — Dec 2012
Ic Design Specialist
Flint, MI
Worked on a complex Clock Tree synthesis for a 45nm application processor chip.
Top-level lead for a 45nm Wimax/LTE chip with responsibilties including flow setup, block partition, CTS and...
Jan 2008 — Jul 2011
Director and General Manager
Managing the India operation of QThink IC Design that has about 25 Engineers, evenly split between Physical Design and Front End Verification. Hands on Physical Design Engineer.
Sep 2001 — Dec 2007
Principal Engineer
3000 Hanover St, San Jose, CA
Place and Route of Inkjet Printer chips from 0.35u to 0.18u.
Project lead for a team of Engineers engaged in various stages of implementation from Synthesis to package testing.
Worked wit...
1996 — 2001
R and D Engineer
Engineering Design of High Resolution Computer Monitors.
High Speed Board Design.
Transfer of products from USA and Taiwan to Singapore
Aug 1991 — Jul 1994
R and D Engineer
Design of Colour and B&W televeision circuits. Design of SMPS.
Aug 1989 — Sep 1991
Education
1995 — 1996
Occupations
Executive
Director
Assistant Vice President
Operations Manager
Vice President
Chief Executive
Skills
Vlsi
Ic
Verilog
Microprocessors
Physical Design
Cmos
Semiconductors
Asic
Rtl Design
Tcl
Floorplanning
Physical Verification
Primetime
Systemverilog
Embedded Systems
Fpga
Drc
Mixed Signal
Application Specific Integrated Circuits
Lvs
Circuit Design
Integrated Circuits
Rtl Coding
Soc
System on A Chip
Power Management
Timing
FAQs about Sundar Raman Ramani
What's the main profession of Sundar Raman Ramani?
This professional's job is Director of Engineering, Asic Design at Synapse Design Automation Inc
What are the profession of Sundar?
These person's professions are Executive and Director
Where does Sundar Raman Ramani live?
Santa Clara, California is the place where Sundar Raman Ramani lives
What is Sundar Raman Ramani's email?
Sundar Raman Ramani's email is sr**@synapse-da.com and ra**@gmail.com.
How many companies did Sundar Raman Ramani work at?
The professional worked at eight jobs.
Where has Sundar Raman Ramani studied?
Sundar studied at the National University of Singapore from 1995 to 1996.
Are there any professional industries, that Sundar Raman Ramani works in?
This person works in Semiconductors industry.
Are there any professional skills, that Sundar Raman Ramani has?
Sundar has such skills as Vlsi, Ic, Verilog, Microprocessors, Physical Design, Cmos, Semiconductors, Asic, Rtl Design, Tcl, Floorplanning, Physical Verification, Primetime, and Systemverilog.