With work experience over 23 years, this expert is currently working at Greenliant Systems situated in 1286 as a Chief Technology Officer. Siamak received his education from 1979 to 1983 at the University of Michigan. Siamak Arya speaks English proficiently. This person lives in Cupertino, California. To contact with Siamak, you can search for their phone number or e-mail address or get further info by requesting access to their additional details on this website.
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Siamak Arya
Last updated Jun 15, 2024
Contact Information
Workplace
Chief Technology Officer
Santa Clara, CA
Industry
Semiconductors, Business Services, Mfg Semiconductors/Related Devices Whol Electronic Parts/Equipment
Colleagues
Work History
Chief Technology Officer
3970 Freedom Cir SUITE 100, Santa Clara, CA 95054
Designed and developed a high performance PCIe SSD. Designed the second generation very high performance PCIe SSD.
May 2010 — Feb 2014
Senior Director Systems Architecture
450 Holger Way, San Jose, CA 95134
Designed PATA, SATA, and eMMC controller architectures. All of these designs have been successfully developed, and are currently sold by Greenliant Systems
Jun 2007 — May 2010
Director of Performance Engineering
350 Ellis St, Mountain View, CA 94043
Evaluate and improve performance of storage software applications.
Sep 2005 — Jan 2007
Vp, System Engineering
Designed a vector processor for high performance video encoding. Designed the processor architecture and instruction set.
Jan 2002 — Mar 2004
President and Principal Architect
SSD and system architecture design including Hardware and firmware architecture and algorithms, performance engineering, and expert witness. www.siamakaryaconsulting.com
from Mar 2004
Director of Architecture
Designed a configurable VLIW processor. Designed architecture and instruction set.
Sep 2000 — Oct 2001
Director of Architecture and Performance
1 Apple Park Way, Cupertino, CA
managed the architecture and performance group to support design of memory controllers using modeling and architecture expertise, evaluate and improve performance of Macs and MacBooks.
Feb 1998 — Sep 2000
Senior Manager Architecture and Performance
900 north Mccarthy Blvd, Milpitas, CA 95035
managed a small team to assist in the design of next generation SGI workstations.
Jul 1995 — Jan 1998
Senior Staff Engineer
3401 Hillview Ave, Palo Alto, CA 94304
Intergraph's advanced processor division was sold to Sun. I continued VLIW design at Sun.
Jan 1994 — Jun 1995
Director, Architecture and Performance
305 Intergraph Way, Madison, AL 35758
design of next generation processor, a VLIW processor, and managed performance and compiler groups.
1991 — 1993
Manager of Architecture and Modeling
architectural support for the design of a distributed fault tolerant system.
1990 — 1991
Senior Principal Engineer
Design of the next generation mini-supercomputer.
1985 — 1987
Education
1979 — 1983
1969 — 1974
Occupations
Executive
Chairperson
Professor
School Principal
Architect
Technology Director
Senior Director
Accountant
Controller
Chief Executive
School Administrator
Educational Manager
Technology Manager
Technical Managers
Senior Manager
Operations Manager
Skills
System Architecture
Soc
Embedded Systems
Digital Signal Processors
Architecture
Processors
Enterprise Software
Computer Architecture
Algorithms
Microprocessors
Fpga
Simulations
Architectures
Hardware Architecture
Storage
High Performance Computing
Firmware