Jerry Roletter

Consumer Electronics

For over 24 years Jerry Roletter has been working in different jobs. Recently, Jerry worked as a Director of Fpga and Asic in Cohere Technologies widening experience. Jerry Roletter graduated from University of California, Santa Cruz in 2013 where this professional got all the knowledge. You can find Jerry Roletter in San Francisco, California, where he is located nowadays. SoftwareOfficial has all the personal info you need to contact Jerry Roletter, such as this professional's number or e-mail. Send us the request to get more info.
Name variants:
Gerald Roletter, Jared Roletter, Jarvis Roletter, Jeremy Roletter, Jerold Roletter, Jerome Roletter, Geraldine Roletter
Last updated May 13, 2024

Contact Information

Last Update
Jul 4, 2022
Email
ro**@hotmail.com, je**@toshiba.com, je**@cohere-technologies.com
Location
San Francisco, CA

Workplace

Cohere Technologies
Director of Fpga and Asic

Santa Clara, CA

Industry

Telecommunications, Commercial Physical Research, Commercial Physical Research, Nsk

Work History

Director of Fpga and Asic

404 Saratoga Ave SUITE 200, Santa Clara, CA 95050
Lead architect for MIMO wireless Integrated Radio Unit. PHY layer implementation for Cohere's 5G modulation. Implemented various signal processing blocks as well as the top-level integration...
Mar 2014 — Jul 2017

Senior Staff Design Engineer - Architecture

ASIC architect involved in SoC architecture for automotive entertainment ASICs using the Ethernet AVB standard to carry audio and video and interfacing to an applications processor over USB3...
Feb 2013 — Mar 2014

Senior Verification Engineer - Console Architecture

1 Microsoft Way, Redmond, WA
Responsible for hardware performance verification on the Xbox including the GPU, CPU and Southbridge. Testing is done in simulation and emulation on the Palladium emulator writing tests in C...
Jul 2011 — Sep 2012

Senior Software Engineer

4500 east West Hwy, Bethesda, MD 20814
CGI development in C++ for MySQL database - Responsible for database storing alert information for Fidelis' Cyber Security product
Feb 2010 — Jul 2011

Senior Principal Engineer

1320 Ridder Park Dr, San Jose, CA 95131
Developing image processing algorithms for motion estimation and motion compensation frame rate conversion for use in ASICs targeted for 120 and 240Hz LCD TVs. Algorithm modeling in C/C++. E...
Oct 2007 — Oct 2009

Senior Asic Engineering Manager

Amd
2485 Augustine Dr, Santa Clara, CA 95054
At peak had 20 direct reports and acted as program manager for ASIC development including full chip design as well as algorithm and SW teams. Led international teams based in India and China...
Apr 2004 — Oct 2007

President

Consulting work for ATI Inc. in ASIC verification for the ASIC used in ATI's consumer product "Theater 550" using Verilog and C (PLI).
Nov 2004 — Apr 2005

Vice President - Business Development

Start-up company formed with other ex-Ericsson co-workers. Company provided WiFi internet access at locations such as hotels, coffee shops, restaurants and sports venues. Company was sold to...
Oct 2002 — Nov 2003

Asic Engineering Manager

Led ASIC team in development of Network Processor used in Ericsson IPI Router. Created ASIC verification environment and developed portions of ASIC in Verilog as well as responsible for I/O ...
Nov 1998 — Dec 2002

Senior Engineer

Algorithm modeling in C, test bench development, ASIC implementation of physical level digital TV demodulator in Verilog. Developed entire verification infrastructure. Worked on two first-si...
Apr 1997 — Nov 1998

Senior Engineer

Software development of MPEG-2 transport level models and verification GUI using Visual Basic. Architected the PID filter ASIC and led verification effort for the chip. Worked on verificatio...
1995 — 1997

Systems Engineer

Developed signal processing algorithms and implemented those in software for Navy ASW simulator. Extensive use of MATLAB for experimentation and filter design. Developed image processing alg...
Jun 1990 — Dec 1994

Education

Occupations

Executive
Director
Architect
IT Professional
Matlab Developer
Engineer
Project Engineer
Artist
Entertainment Professional
Operations Manager
Software Developer
Software Developers
Engineering Specialist
Entertainer

Skills

Asic
Verilog
Soc
Digital Signal Processors
Fpga
Debugging
Embedded Software
Semiconductors
Perl
Rtl Design
Embedded Systems
Firmware
Vlsi
C
Functional Verification
Hardware Architecture
C++
Simulations
Image Processing
Signal Processing
Mysql
Network Security
Network Processors
Matlab
Vhdl
Microprocessors
Processors
Static Timing Analysis
Rtos

FAQs about Jerry Roletter

What is the main profession of Jerry Roletter?

Jerry is a Consumer Electronics.

What are the main profession of The expert?

These person's professions are Executive and Director

Where does Jerry Roletter live?

San Francisco, California is the place where Jerry Roletter lives

Does Jerry have the email address?

ro**@hotmail.com and je**@toshiba.com is Jerry's email address.

Where did Jerry Roletter work?

Jerry Roletter worked at Cohere Technologies, Toshiba.

Where has Jerry Roletter studied?

Jerry studied at the University of California, Santa Cruz from 2013 to 2013.

What are special skills of Jerry Roletter?

This professional has such skills as Asic, Verilog, Soc, Digital Signal Processors, Fpga, Debugging, Embedded Software, Semiconductors, Perl, Rtl Design, Embedded Systems, Firmware, Vlsi, and C.
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