Carl Ashley

Design Verification Engineer

For over 34 years Carl Ashley has been working in different jobs. Recently, this expert worked as a Design Verification Engineer in Asic North widening experience. This person graduated from University of Florida in 1978 where this person received all the skills. You can find this person in Burlington, Vermont, where he lives nowadays. SoftwareOfficial has all the personal info you need to contact Carl Ashley, such as Carl's number or e-mail. Feel free to send us the request to get additional data.
Name variants:
Karl Ashley
Last updated Jul 05, 2024

Contact Information

Last Update
Feb 1, 2016
Email
ca**@gmail.com, ca**@asicnorth.com
Location
Burlington, VT
Company

Workplace

ASIC North
Design Verification Engineer

Williston, VT

Industry

Semiconductors, Commercial Physical Research Engineering Services, Research & Development in Biotechnology

Work History

Design Verification Engineer

291 Hurricane Ln SUITE 100, Williston, VT 05495
Mar 2017 — Oct 2019

Retired From Ibm

from Aug 2013

Senior Engineer - Simulation Model Development

Ibm
New York, NY
Development of complex communication protocol functional verification models for high speed networks such as InfiniBand and PCi Express. As team lead my tasks have encompassed project defini...
Apr 2001 — Jul 2013

Senior Engineer - Asic Core Methodology

Ibm
New York, NY
Enhanced design guidelines and developed guided work flow automation for core design development and packaging of core design kit delivery to IBM customers. Led a team which authored the cor...
May 1999 — Apr 2001

Senior Engineer - Asic Core Architect and Designer

Ibm
New York, NY
3D Graphics Bus Core development and customer relations (Sun/Infotronics, & IBM). Developed architecture for a new AGP interface core for use by both internal and external IBM ASIC developer...
Sep 1996 — Apr 1999

Senior Engineer - Processor Micro Architecture Verification Lead

Ibm
New York, NY
Performed the following unit verification work on a high performance superscalar processor design: X86 emulation unit verification Developed irritator C code to cause more frequent bad pr...
May 1995 — Aug 1996

Senior Engineer - Pcmcia Asic Design Team Lead

Ibm
New York, NY
Developed ASIC sweep of logic on multifunction PCMCIA card based on a previously developed prototype implemented using an Atmel FPGA.
Jun 1994 — May 1995

Senior Engineer - Asic Designer For Pc

Ibm
New York, NY
Team lead developing CMOS ASIC for PCI to PCMCIA bridge chip with system power management for low power desktop computer. Designed, verified and released chip design to Texas Instruments. Le...
May 1993 — Jun 1994

Manager Tokyo Systems Evaluation Lab Ps

Ibm
New York, NY
Competitive Analysis of Personal Computers and Consumer electronics via Patent trend Analysis, fab building permits, trade show attendance. Provided updates to group executives through regul...
Aug 1991 — Apr 1993

Engineer

Ibm
New York, NY
Numerous jobs in test engineering, management, and system simulation over this ten year period with the IBM PC company when it started as an Independent Business Unit and was subsequently in...
Jun 1981 — Aug 1991

Education

Occupations

IT Professional
Computer Network Professional
Engineer
Executive
Team Leader
Network Administrator
Operations Manager

Skills

ASIC
Functional Verification
Microprocessors
PCIe
Firmware
Infiniband
Team Leadership
Virtual Teams
Collaborative
Debugging
Processors
Verilog
Hardware
Computer Architecture
Asic
Pcie
C
Testing
Vlsi
Eda
Hardware Architecture
Logic Design
Soc
Tcl
Static Timing Analysis
Fpga
Cmos
Simulations
High Performance Computing
Systemverilog
Rtl Design
X86
Ic
Perl
Embedded Systems
Semiconductors
Modelsim
Timing Closure
Integrated Circuit Design
Thought Leadership
Io Design
Verification
Linux
Mentoring
C++
Vhdl
Customer Engagement
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