Rajkumar Seshasayee is a highly qualified professional, who works in Cadence Design Systems as a Senior Member of Consulting Staff from 2005. This expert gained professional experience in more than five positions at various companies. Rajkumar Seshasayee went to the Bharathiar University and was studying from 1996 to 1998. San Francisco, California is the area, where this person was lastly known to live. Rajkumar Seshasayee's phone number and email are easily accessed through SoftwareOfficial by request.
Name variants:
Rajkumar Seshasayee
Last updated Jun 08, 2024
Contact Information
Last Update
Jan 29, 2016
Email
rs**@cadence.com, ra**@hotmail.com
Location
San Francisco, CA
Company
Workplace

Senior Member of Consulting Staff
San Jose, CA
Industry
Computer Software, Prepackaged Software, Dev Computer-Aided Design Software & Related Services, Develops Computer-Aided Design Software & Related Services, Software Development, Software Publishers
Colleagues
Work History
Senior Member of Consulting Staff
Architect, design and implement EDA software solutions for semiconductor chip designing specifically in timing, delay calculation and signal integrity areas.
from Nov 2005
Senior Member of Technical staff
Architect, design and develop formal verification EDA solutions for semiconductor chip design
Nov 2004 — Nov 2005
Software Engineer
Design and develop asic logic synthesis and formal verification EDA solutions for semiconductor chip design
May 2001 — Oct 2004
Senior Software Engineer
Design and develop logic and physical synthesis EDA software solutions for semiconductor chip design
Feb 1998 — May 2001
Senior officer
Develop, maintain and service electrical and electronic systems used in the manufacture of plastic luggage.
Aug 1991 — Aug 1994
Education
1996 — 1998
1987 — 1991
Occupations
IT Professional
Computer Software Professional
Architect
Technical Specialist
Software Developers
Technical Support Specialists
Skills
EDA
Formal Verification
ASIC
IC
Semiconductors
timing and signal integrity
Eda
Asic
Ic
Timing and Signal Integrity
Fpga
Verilog
Tcl
Debugging
Logic Synthesis
C
Perl
Soc