Pavithra Maridi

Senior Physical Design Engineer

Pavithra Maridi is a high-skilled professional, that works in Aricent main office of which is in 1286. as a Physical Design Engineer from 2018. Pavithra Maridi has earned professional experience in more than six positions at different companies. Pavithra Maridi went to the Swarna Barathi College of Engineering and received education from 2008 to 2012. San Jose, California is the area, where this professional was lastly known to settle. Pavithra Maridi's email address and number are accessed through this website on demand.
Name variants:
Pavithra Maridi
Last updated Apr 05, 2024

Contact Information

Last Update
Jul 11, 2022
Email
pa**@gmail.com, pa**@gmail.com
Location
San Jose, CA
Company

Workplace

Aricent
Physical Design Engineer

Redwood City, CA

Industry

Outsourcing/Offshoring

Work History

Physical Design Engineer

3979 Freedom Cir SUITE 950, Santa Clara, CA 95054
May 2018 — Jan 2019

Senior Physical Design Engineer

Santa Clara, CA
from Jan 2019

Freelance Physical Design Trainer

Planned and executed lessons based on the students requirements. Prepared and provided materials for classroom instruction. Proved competence in teaching and mentoring students in preparin...
Sep 2016 — Jan 2018

Physical Design Engineer

Worked on Multiple projects for Client Qualcomm India
Aug 2012 — Jan 2016

Contract Physical Design Engineer

San Diego, CA
Role: Full PD implementation (Floor planning to GDSII) of 1 SubHm and partitioning the camera sub-system using First Encounter tool. Challenges: As the block was rectilinear (and with lo...
Jan 2013 — Jan 2016

Project Trainee

Successfully completed Physical Design training. As part of the training, have worked on development of small test designs, implement physical design from floorplan to signoff analysis. H...
Oct 2011 — Jul 2012

Education

Occupations

Engineer
Project Engineer
Engineering Specialist

Skills

Asic
Vlsi
Static Timing Analysis
Soc
Systemverilog
Verilog
Integrated Circuit Design
Timing Closure
Physical Design
Rtl Design
Unix
Linux
Perl
Clp
Upf
Low Power Design
Logic Gates
Logic Design
Logic Synthesis
Physical Verification
Cmos
Application Specific Integrated Circuits
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