Bart Bergman

Design Center Offering Director

Bart Bergman is a high-skilled professional, working in American Institute For Manufacturing Integrated Photonics main office of which is in 998. on the position of Design Center Offering Director from 2018. This person has earned professional experience in more than 13 positions at various companies. Bart Bergman went to the University of North Dakota and received education from 1980 to 1983. Lakeville, Minnesota is the city, where this expert was known to live. Their e-mail and phone are easily accessed through this website on demand.
Name variants:
Bartholomew Bergman
Last updated Jul 03, 2024

Contact Information

Last Update
Jul 11, 2022
Email
bb**@gmail.com
Location
Lakeville, MN
Company
American Institute For Manufacturing Integrated Photonics

Workplace

Work History

Design Center Offering Director

257 Fuller Rd, Albany, NY 12203
from Mar 2018

Principal Ic Engineer

Eden Prairie, MN
I was the Tech Lead for the Sonnet 3 IC development project. I lead a team of approximately 20 engineers responsible for analog design, analog layout, digital design, P&R, Test and verificat...
Jun 2017 — Dec 2017

Digital Circuit Designer

Implemented Power9 L2 cache macro's starting with VHDL source. I was responsible for creating perfect layout as exhibited by a 4.0 grade in Gate Level Signoff. Entire tool chain used from ph...
Jul 2016 — Mar 2017

President

Worked with two established Minnesota based companies to improve their businesses. Helped CrossFire Technologies incubate a new “More than Moore” semiconductor technology whose benefits incl...
from Jun 2013

Director of Sales

Austin, TX
Sell high reliability space and high temperature semiconductors worldwide through direct sales. Manage a partner selling relationship with Texas Instruments. Brought an 8.5 Million dollar IC...
Apr 2012 — Jun 2013

Ip Quartermaster

48720 Kato Rd, Fremont, CA 94538
Jan 2010 — Jan 2012

Consultant and Founder

Senior Physical Implementation/Timing Engineer for IBM ASIC at Cisco (Doppler). Used TCL to automate the block timing methodology and reduced the block level runtime from 2 weeks to 12 hours...
Mar 2002 — Jan 2010

Director of East Coast Sales

Developed a COT sales territory east of the Mississippi River, including Canada. Planned successful strategies to penetrate and develop new accounts. Created corporate and product presentati...
Jun 2001 — Jun 2002

Director of Sales and Marketing

5900 Green Oak Dr, Hopkins, MN 55343
Executive manager of business with responsibilities including EDA tool flow, human resources, strategy and marketing. Sole provider of revenue. Grew revenue from $300K annually to $4.5M annu...
1998 — 2001

Senior Sales Representative

Led the company in sales from Minnesota. Grew a stagnant territory into the leading territory in North America during my two years. Increased total revenue 450% in 1996, while closing the si...
1995 — 1998

Application Engineer Consultant

8005 southwest Boeckman Rd, Wilsonville, OR 97070
Worked in a Silicon Compiler sales office as part of a team that transformed Mentor’s Texas territory from a weak performer into Mentor's top sales region for three years in a row. Initially...
1989 — 1995

Design Engineer and Application Engineer

Design engineer, responsible for the design and test of the Fault Evaluator and the architectural simulation of the System Evaluator. Relocated to Dallas, Texas as an Application Engineer. S...
1985 — 1989

Asic Designer

Designed seven functional integrated circuits for the I/O processor in the AN/YUK-43 mainframe computer. Performed checkout to verify functionality of these circuits, as well as the I/O proc...
1983 — 1985

Occupations

Executive
Director
Professor
School Principal
Engineer
Operations Manager
School Administrator
Educational Manager

Skills

Semiconductors
Eda
Asic
Ic
Soc
Static Timing Analysis
Management
Simulations
Semiconductor Industry
Tcl
Mixed Signal
Debugging
Vhdl
Fpga
Verilog
Testing
Cmos
Dft
Integrated Circuit Design
Physical Design
Marketing
Vlsi
Embedded Systems
Processors
Microprocessors
Silicon
Hardware Architecture
Timing Closure
Application Specific Integrated Circuits
Serdes
Arm
Logic Synthesis
Integrated Circuits
Very Large Scale Integration
System on A Chip
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