Arvin Shahani is a eficient professional, working in Fairchild Semiconductor main office of which is in 1. as a Senior Product Line Director, Mobile Power from 2015. This person gained professional experience in more than nine positions at different companies. Arvin Shahani went to the Stanford University and got education from 1995 to 1999. Fremont, California is the area, where this expert was lastly known to settle. Arvin Shahani's email address and phone can be accessed through this website on demand.
Name variants:
Arvin Shahani
Last updated Jun 30, 2024
Contact Information
Last Update
Jul 4, 2022
Email
ar**@yahoo.com, ar**@gmail.com
Location
Fremont, CA
Company
Fairchild Semiconductor
Workplace
Senior Product Line Director, Mobile Power
Work History
Senior Product Line Director, Mobile Power
5005 east Mcdowell Rd, Phoenix, AZ 85008
Responsible for setting the strategy for Fairchild's Mobile Power business by identifying trends in the smartphone market and developing products to meet those trends Fairchild's mobile powe...
from Oct 2015
Senior Director, Design Engineering
5005 east Mcdowell Rd, Phoenix, AZ 85008
Managed the engineering organization responsible for developing new power management products for smartphone and wearable applications Functional groups in my organization included architect...
Jul 2012 — Oct 2015
Director, Design Engineering
5005 east Mcdowell Rd, Phoenix, AZ 85008
Managed design teams developing linear and switching voltage regulators, switching chargers, and LED drivers Design lead for Fairchild's first three switching chargers: FAN5400, FAN5421, and...
Apr 2009 — Jul 2012
Senior Member of Technical Staff
5005 east Mcdowell Rd, Phoenix, AZ 85008
Worked on low quiescent current, fast transient response buck converters switching at 6 MHz, dynamic voltage scaling buck converters switching at 3 and 6 MHz, and high frequency buck convert...
Jan 2006 — Apr 2009
Principal Design Engineer
Worked on 10 Gbps CMOS equalizers, with a specific emphasis on backplane applications Designed a digital clock recovery and filtering architecture in 0.13um CMOS at 10 Gbps Investigated erro...
Dec 2004 — Nov 2005
Member of Technical Staff
Designed a CMOS I&Q up-converter and PA driver for a 3G transmitter IC Involved in transmitter architecture definition and performance analysis
Oct 2003 — Dec 2004
Manager of Ic Design
Managed a team of 3 senior design engineers engaged in different circuit design projects, including high-speed distributed amplifiers, limiting amplifiers, AGC amplifiers, analog equalizers,...
Jun 2001 — Oct 2003
Senior Design Engineer
Designed high-speed transimpedance amplifiers for 40 Gbps optical networking applications Designs were done in a variety of process technologies, including III-V semiconductor and silicon pr...
Oct 2000 — Jun 2001
Chief Technology Officer
Worked on a proprietary air interface for a wireless last-mile system to compete with DSL and cable modem solutions The air interface was designed for guard bands adjacent to public safety s...
Mar 1999 — Oct 2000
Education
Sep 1995 — Apr 1999
Sep 1993 — Jun 1995
Sep 1989 — Jun 1993
Occupations
Executive
Director
Business Administrator
Senior Director
Operations Manager
Senior Manager
Skills
Semiconductors
Mixed Signal
Analog
Ic
Integrated Circuit Design
Asic
Cmos
Power Management
Circuit Design
Hardware Architecture
Analog Circuit Design
Soc
Consumer Electronics
Eda
Debugging
Embedded Systems
Semiconductor Industry