Anupam Rastogi

Design Verification Manager

Anupam Rastogi is a highly qualified expert, that works in Facebook main office of which is in 1067. as a Design Verification Manager from 2018. Anupam Rastogi gained professional experience in more than ten positions at various companies. Anupam Rastogi went to the Birla Institute of Technology, Mesra and got education. Sunnyvale, California is the area, where this expert was lastly known to settle. This expert's email address and number can be easily accessed through this website on demand.
Name variants:
Anupam Rastogi
Last updated Jun 29, 2024

Contact Information

Last Update
Jun 21, 2022
Email
an**@yahoo.com, an**@magnumsemi.com
Location
Sunnyvale, CA
Company

Workplace

Facebook
Design Verification Manager

Menlo Park, CA

Industry

Internet, Nonclassifiable Establishments

Work History

Design Verification Manager

1 Hacker Way, Menlo Park, CA
from Feb 2018

Director Verification

3945 Freedom Cir SUITE 360, Santa Clara, CA 95054
Dec 2016 — Jan 2018

Director Verification

130 Baytech Dr, San Jose, CA 95134
Through acquisition of Magnum Semi
Apr 2016 — Nov 2016

Director of Verification

591 Yosemite Dr, Milpitas, CA 95035
Director of Verification at Magnum Semiconductor
Apr 2012 — Mar 2016

Senior Manager - Verification

591 Yosemite Dr, Milpitas, CA 95035
Sep 2009 — Apr 2012

Consultant - Back End Video Verification

591 Yosemite Dr, Milpitas, CA 95035
Dec 2008 — Aug 2009

Verification Lead

Oct 2006 — Oct 2008

Engineering Manager - Verification

Thru acquisition of VLSI Technologies
Apr 2000 — Oct 2006

Principal Engineer

Sep 1997 — Apr 2000

Senior Engineer

Jul 1995 — Sep 1997

Occupations

Executive
Manager
Director
Operations Manager

Skills

Soc
Systemverilog
Verilog
Debugging
Asic
Open Verification Methodology
Digital Signal Processors
Simulations
Semiconductors
Eda
Fpga
Integrated Circuit Design
System on A Chip
Embedded Systems
C
Field Programmable Gate Arrays
Ic
Perl
Application Specific Integrated Circuits
Integrated Circuits
Universal Verification Methodology
Low Power Design
Login