We found the following information about Amadies K Sun at Arteris, where Amadies has worked as a Cae since 2019. Amadies's total work experience is over 23 years, during which time this professional had at least six jobs at different companies to develop skills. Amadies studied at the University of Southern California from 1989 to 1990. Currently, Amadies K Sun lives in Cupertino, California. You can contact with Amadies by looking for phone number or email or get full information by requesting access to this person's further details from SoftwareOfficial.
Name variants:
Amadies Sun
Last updated Jul 02, 2024
Contact Information
Last Update
Jun 23, 2022
Email
am**@yahoo.com, as**@hotmail.com, am**@synopsys.com
Location
Cupertino, CA
Company
Workplace
Colleagues
Work History
Cae
595 Millich Dr SUITE 200, Campbell, CA 95008
QA, debug, propose enhancements on AXI, ACE, CHI UVM environment.
Create UVM directed tests for function verification and hardware IP debug.
Run VCS, IUS, Questa simulations to verify har...
from Jun 2019
Senior Staff Applications and Product Engineer
690 east Middlefield Rd, Mountain View, CA 94043
VCS/Verdi Product Engineer. Strong Verdi expertise & leadership.
Tested Verdi developing features at Intel site and successfully passed testing on 20~ IPs and SOC designs within 2018 ~ 201...
Nov 2012 — Mar 2019
Director, Cae
Led CAE team to support worldwide customers and gained #1 customer satisfactions with consecutive years, earning Novas ranking as #1 in EDA customer satisfaction for 5 consecutive years by ...
Apr 2000 — Nov 2012
Senior Manager, Asic Group
Used Xilinx FPGA to prove prototype design before going to silicon.
Emulated PC chipsets Southbridge: 8237 & 8259 DMA/IRQ behavior on PCI bus, filed patent.
Implemented audio interface: A...
Nov 1997 — Mar 2000
Senior Asic Design Engineer
Used Philips’ 80C51XA macro controller to emulate ISA bus audio controller behavior on PCI bus. Digitized analog game port signals.
Mar 1997 — Oct 1997
Senior Asic Design Engineer
3011 west Grand Blvd SUITE 2100, Detroit, MI 48202
Developed in-house DSP core to execute H.321, G.723, and MPEG1 audio decoding algorithm.
Apr 1996 — Feb 1997
Education
1989 — 1990
1984 — 1988
Occupations
Executive
Chief Audit Executive
IT Professional
Computer Software Professional
Engineer
Chief Executive
Software Developers
Skills
Eda
Asic
Perl
Vhdl
Linux
Unix
Tcl
Product Management
Fpga
Verilog
Systemverilog
Semiconductors
License Management
Digital Audio
Ic
Vlsi
Logic Synthesis
Application Specific Integrated Circuits
Field Programmable Gate Arrays
Cad
Audio Engineering
Debugging
Xilinx
Testing
Rtl Design
System on A Chip
Digital Signal Processors
Simulations
C (Programming Language